EDN

FPGA design and verification using Simulink

Xilinx System Generator for DSP is a MATLAB Simulink block set that facilitates system design. Targeting Xilinx FPGAs within the familiar MATLAB environment, System Generator for DSP gives you the ...
EDN

Timing-driven Simulink FPGA synthesis

Simulink is popular among DSP designers, and FPGA vendors have taken note. These vendors have created blockset libraries that enable Simulink designs to be synthesized to an FPGA implementation. While ...
Electronics Weekly

MATLAB and Simulink added to Avnet’s FPGA offering

The distributor claimed the development kit will allow users to build and test models in Simulink and automatically generate HDL code for Kintex-7 FPGAs, which “will let engineers focus more on their ...
Business Wire

MathWorks Speeds Up FPGA-in-the-Loop Verification

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced new capabilities in HDL Verifier to speed up FPGA-in-the-loop (FIL) verification. The new FIL capabilities enable faster communication with ...
Design-Reuse

Microsemi Collaborates with MathWorks to Deliver First Integrated FPGA-in-the-Loop Workflow for PolarFire and SmartFusion2 FPGA Development Boards

ALISO VIEJO, Calif. -- April 19, 2018-- Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today ...
Electronic Design

PCs Bridge The Gap Between DSP And FPGA Designers

Typically, DSP designers are unfamiliar with FPGA design tools, and FPGA designers are unfamiliar with DSP algorithms. But when Sandia National Laboratories needed to replace an analog implementation ...
Electronics Weekly

MathWorks couples MATLAB with FPGA design flow

MathWorks has coupled its MATLAB design tool more closely to FPGA design. It has introduced a software tool which automatically generates HDL code from MATLAB for implementing FPGA and Asic designs ...
New Electronics

First integrated FPGA-in-the-loop workflow for PolarFire and SmartFusion2 FPGA development boards

Microsemi has announced a collaboration with MathWorks to launch hardware support for field programmable gate array (FPGA)-in-the-loop (FIL) verification workflow with Microsemi FPGA development ...